E*7AMD/MMI PLD Library #5 [CE Devices] - V2.30C12552& PALCE16V8H/Q+EE2/EE4-Based CMOS Programmable Array Logic CE16V8_FMY CE16V8_ARRAY 00C ,HPp ,`j ,@`demnr ,-#14614&PALLV16V8-10/5'EE5-Based CMOS Programmable Array Logic LV16V8_FMY CE16V8_ARRAY 00C ,HPp ,`j ,@`demnr ,-#14952& PALLV16V8'EE5-Based CMOS Programmable Array Logic LV16V8_FMY CE16V8_ARRAY 00X ,HPp ,`j ,@`demnr ,-#13156&10H8Subset of PALCE16V8 CE16V8_FMY RAL10H8_ARRAY 00C 13157&10L8Subset of PALCE16V8 CE16V8_FMY RAL10L8_ARRAY 00C 13158&10P8Subset of PALCE16V8 CE16V8_FMY RAL10P8_ARRAY 00C 13159&12H6Subset of PALCE16V8 CE16V8_FMY RAL12H6_ARRAY 00C 13160&12L6Subset of PALCE16V8 CE16V8_FMY RAL12L6_ARRAY 00C 13161&12P6Subset of PALCE16V8 CE16V8_FMY RAL12P6_ARRAY 00C 13162&14H4Subset of PALCE16V8 CE16V8_FMY RAL14H4_ARRAY 00C 13163&14L4Subset of PALCE16V8 CE16V8_FMY RAL14L4_ARRAY 00C 13164&14P4Subset of PALCE16V8 CE16V8_FMY RAL14P4_ARRAY 00C 13165&16H2Subset of PALCE16V8 CE16V8_FMY RAL16H2_ARRAY 00C 13166&16L2Subset of PALCE16V8 CE16V8_FMY RAL16L2_ARRAY 00C 13167&16P2Subset of PALCE16V8 CE16V8_FMY RAL16P2_ARRAY 00C 13168&16H8Subset of PALCE16V8 CE16V8_FMY RAL16H8_ARRAY 00C 13169&16L8Subset of PALCE16V8 CE16V8_FMY RAL16L8_ARRAY 00C 13170&16P8Subset of PALCE16V8 CE16V8_FMY RAL16P8_ARRAY 00C 13171&16RP8Subset of PALCE16V8 CE16V8_FMYRAL16RP8_ARRAY 00C 13172&16R8Subset of PALCE16V8 CE16V8_FMY RAL16R8_ARRAY 00C 13173&16RP6Subset of PALCE16V8 CE16V8_FMYRAL16RP6_ARRAY 00C 13174&16R6Subset of PALCE16V8 CE16V8_FMY RAL16R6_ARRAY 00C 13176&16R4Subset of PALCE16V8 CE16V8_FMY RAL16R4_ARRAY 00C 13175&16RP4Subset of PALCE16V8 CE16V8_FMYRAL16RP4_ARRAY 00C 12869& PALCE20V8H/Q+EE2/EE4-Based CMOS Programmable Array Logic CE20V8_FMY  CE20V8_ARRAY 00C (   H P p (`j ( @ ` d e m n r (-#13177&14H8Subset of PALCE20V8 CE20V8_FMY  RAL14H8_ARRAY 00C 13178&14L8Subset of PALCE20V8 CE20V8_FMY  RAL14L8_ARRAY 00C 13179&14P8Subset of PALCE20V8 CE20V8_FMY  RAL14P8_ARRAY 00C 13180&16H6Subset of PALCE20V8 CE20V8_FMY  RAL16H6_ARRAY 00C 13181&16L6Subset of PALCE20V8 CE20V8_FMY  RAL16L6_ARRAY 00C 13182&16P6Subset of PALCE20V8 CE20V8_FMY  RAL16P6_ARRAY 00C 13183&18H4Subset of PALCE20V8 CE20V8_FMY  RAL18H4_ARRAY 00C 13184&18L4Subset of PALCE20V8 CE20V8_FMY  RAL18L4_ARRAY 00C 13185&18P4Subset of PALCE20V8 CE20V8_FMY  RAL18P4_ARRAY 00C 13186&20H2Subset of PALCE20V8 CE20V8_FMY  RAL20H2_ARRAY 00C 13187&20L2Subset of PALCE20V8 CE20V8_FMY  RAL20L2_ARRAY 00C 13188&20P2Subset of PALCE20V8 CE20V8_FMY  RAL20P2_ARRAY 00C 13190&20L8Subset of PALCE20V8 CE20V8_FMY  RAL20L8_ARRAY 00C 13192&20RP8Subset of PALCE20V8 CE20V8_FMY RAL20RP8_ARRAY 00C 13193&20R8Subset of PALCE20V8 CE20V8_FMY  RAL20R8_ARRAY 00C 13194&20RP6Subset of PALCE20V8 CE20V8_FMY RAL20RP6_ARRAY 00C 13195&20R6Subset of PALCE20V8 CE20V8_FMY  RAL20R6_ARRAY 00C 13196&20RP4Subset of PALCE20V8 CE20V8_FMY RAL20RP4_ARRAY 00C 13197&20R4Subset of PALCE20V8 CE20V8_FMY  RAL20R4_ARRAY 00C 12300& PALCE20RA10H+EE2/EE4-Based CMOS Programmable Array LogicEE20RA10EE20RA10_ARRAY 00C 22300&PALCE20RA10H - 20+EE2/EE4-Based CMOS Programmable Array LogicEE20RA10EE20RA10_ARRAY 00C 12543& PALCE20RA10Z"Registered Async And-Or Gate Array MAP_24_EEPALC20RA10Z_ARRAY 00C 12809& PALCE22V10H/Q+EE2/EE4-Based CMOS Programmable Array Logic 22V10_FMY CE22V10_ARRAY 00C 14407&PALCE22V10H/5 (DIP)&EE-Based CMOS Programmable Array Logic 22V10_FMY CE22V10_ARRAY 00C 25230&PALCE22V10H/5 (PLCC)&EE-Based CMOS Programmable Array Logic22V10_PLCC_FMYCE22V10_PLCC_ARRAY 00D 14985& PALLV22V10&EE-Based CMOS Programmable Array Logic 22LV10_FMY 22LV10_ARRAY 00C 13457& PALCE22V10Z+EE2/EE4-Based CMOS Programmable Array Logic 22V10Z_FMY CE22V10_ARRAY 00B 14791& PALLV22V10ZProgrammable Array Logic LV22V10Z_FMY CE22V10_ARRAY 00C 13372& PALCE24V10H&EE-Based CMOS Programmable Array Logic 24V10_FMY CE24V10_ARRAY 00C 12421& PALCE26V12H/4&EE-Based CMOS Programmable Array Logic 26V12_FMY 26V12_ARRAY 00C 22421&PALCE26V12H-15/4&EE-Based CMOS Programmable Array Logic 26V12_FMY_15 26V12_ARRAY 00C 12015& PALCE29M16&EE-Based CMOS Programmable Array Logic 29MXX_FMY 29M16_ARRAY 00C 13804& PALCE29M16H/4'EE4-Based CMOS Programmable Array Logic 29MXX_4FMY 29M16_4ARRAY 00C 12019& PALCE29MA16&EE-Based CMOS Programmable Array Logic 29MXX_FMY 29MA16_ARRAY 00C 13805&PALCE29MA16H/4'EE4-Based CMOS Programmable Array Logic 29MAX_4FMY 29MA16_4ARRAY 00C 13296&PALCE610-CMOS And-Or Gate Array with Output Macrocells MMI_PALCE610PALCE610_ARRAY 00C  CE16V8_FMYAMDAMCE16V8# 2   2 2 2   $2%d( LV16V8_FMYAMDLVCE16V8#J  h , 2 2    $2% d(J+h,-h CE20V8_FMYAMDAMCE16V8# F   F d7 F   $F%d 29MXX_FMYAMDAMD29MXX     d      29MXX_4FMYAMDCE29MXX4     2 #     %d 29MAX_4FMYAMDCE29MAX4     2 #     %dEE20RA10MMICE20RA10!     2     MMI_PALCE610AMD/MMICE630     2d    %d  22V10_FMYAMDCE22V10 2    7 2   %d$Fk+T,-T 22LV10_FMYAMDAM22LV10k k h ,  2 k   %d2+T,-T 22V10Z_FMYAMDCE22V10Z 2    7 2   %d$ FR+T,-T LV22V10Z_FMYAMDLV22V10Z     7    %dJ$ FR+J,-J MAP_24_EEMMIAMD_EE          %$ 26V12_FMYAMDAMD26V12 F    2  %d$2+,- 26V12_FMY_15AMDAMD26V12 F    2  %d$2+,- 24V10_FMYAMDAMD24V10     2  %d+,-22V10_PLCC_FMYAMD22V10_5 2    7 2 %d$Fk+T,-T CE16V8_ARRAYAnd/Or      !#  UES Array@   @ Arch - Xor Array@R  R <=!>? RAL10H8_ARRAYAnd/Or@     !# (????????)????????*%330&330'330Arch - Xor ArrayB  R <=!>?( ) * 000 UES Array@   @  RAL10L8_ARRAYAnd/Or@     !# (????????)????????*%330&330'330Arch - Xor ArrayB  R <=!>?( ) * 0000 UES Array@   @  RAL10P8_ARRAYAnd/Or@     !# (????????)????????*%330&330'330Arch - Xor Array@  R <=!>?( ?) ?* 0000 UES Array@   @  RAL12H6_ARRAYAnd/Or     !# (????)????%33&33'33Arch - Xor ArrayB  R <=!>?( ) * 0< UES Array@   @  RAL12L6_ARRAYAnd/Or     !# (????)????%33&33'33Arch - Xor ArrayB  R <=!>?( ) *  00< UES Array@   @  RAL12P6_ARRAYAnd/Or     !# (????)????%33&33'33Arch - Xor Array  R <=!>?( ) ?*  00< UES Array@  @  RAL14H4_ARRAYAnd/Or     !# ()%0&0'0Arch - Xor ArrayB  R <=!>?( ) * < UES Array@   @  RAL14L4_ARRAYAnd/Or     !# ()%0&0'0Arch - Xor ArrayB  R <=!>?( ) * << UES Array@  @  RAL14P4_ARRAYAnd/Or     !# ()%0&0'0Arch - Xor Array  R <=!>?( ) ?* << UES Array@  @  RAL16H2_ARRAYAnd/Or     !# ()*Arch - Xor ArrayB  R <=!>?( ) * ? UES Array@   @  RAL16L2_ARRAYAnd/Or     !# ()*Arch - Xor ArrayB  R <=!>?( ) * ?( ) ?* ?( ) *  UES Array@  @  RAL16L8_ARRAYAnd/Or     !# Arch - Xor ArrayB  R <=!>?( ) * ? UES Array@   @  RAL16P8_ARRAYAnd/Or     !# Arch - Xor Array  R <=!>?( ?) ?* ? UES Array@  @ RAL16RP8_ARRAYAnd/Or     !# Arch - Xor Array  R <=!>?( ?) ?* ? UES Array@  @  RAL16R8_ARRAYAnd/Or     !# Arch - Xor ArrayB  R <=!>?( ) * ? UES Array@  @ RAL16RP6_ARRAYAnd/Or     !# Arch - Xor Array  R <=!>?( ?) ?* ? UES Array@  @  RAL16R6_ARRAYAnd/Or     !# Arch - Xor ArrayB  R <=!>?( ) * ? UES Array@  @  RAL16R4_ARRAYAnd/Or     !# Arch - Xor ArrayB  R <=!>?( ) * ? UES Array@  @ RAL16RP4_ARRAYAnd/Or     !# Arch - Xor Array  R <=!>?( ?) ?* ? UES Array@  @  CE20V8_ARRAYAnd/Or    ( !# +@ UES Array @   @(Arch - Xor Array@ R  R <=)>? RAL14H8_ARRAY And-Or Array0   ( !# +@( ??????) ??????* %333&333'333Arch - Xor ArrayB  R <=)>?( ) * 00< UES Array@   @( RAL14L8_ARRAY And-Or Array0   ( !# +@( ??????) ??????* %333&333'333Arch - Xor ArrayB  R <=)>?( ) * 000< UES Array@   @( RAL14P8_ARRAY And-Or Array0   ( !# +@( ??????) ??????* %333&333'333Arch - Xor Array0  R <=)>?( ?) ?* 000< UES Array@   @( RAL16H6_ARRAY And-Or Array   ( !# +@( ??) ??* %30&30'30Arch - Xor ArrayB  R <=)>?( ) * << UES Array@   @( RAL16L6_ARRAY And-Or Array   ( !# +@( ??) ??* %30&30'30Arch - Xor ArrayB  R <=)>?( ) *  0<< UES Array@   @( RAL16P6_ARRAY And-Or Array   ( !# +@( ??) ??* %30&30'30Arch - Xor Array  R <=)>?( ) ?*  0<< UES Array@   @( RAL18H4_ARRAY And-Or Array   ( !# +@( ) * %3&3'3Arch - Xor ArrayB  R <=)>?( ) * ? UES Array@   @( RAL18L4_ARRAY And-Or Array   ( !# +@( ) * %3&3'3Arch - Xor ArrayB  R <=)>?( ) * ?( ) ?* ?( ) * ? UES Array@   @( RAL20L2_ARRAY And-Or Array   ( !# +@( ) * Arch - Xor ArrayB  R <=)>?( ) * ?( ) ?* ?( ) * ? UES Array@   @( RAL20L8_ARRAY And-Or Array   ( !# +@Arch - Xor ArrayB  R <=)>?( ) * ? UES Array@   @(RAL20RP8_ARRAY And-Or Array   ( !# +@Arch - Xor Array   R <=)>?( ?) ?* ? UES Array@   @( RAL20R6_ARRAY And-Or Array   ( !# +@Arch - Xor ArrayB  R <=)>?( ) * ? UES Array@   @(RAL20RP6_ARRAY And-Or Array   ( !# +@Arch - Xor Array   R <=)>?( ?) ?* ? UES Array@   @( RAL20R4_ARRAY And-Or Array   ( !# +@Arch - Xor ArrayB  R <=)>?( ) * ? UES Array@   @(RAL20RP4_ARRAY And-Or Array   ( !# +@Arch - Xor Array   R <=)>?( ?) ?* ? UES Array@   @(PALC20RA10Z_ARRAYAnd-Or    ( ! # Polarity Fusesd      29M16_ARRAYAnd/Or *   :  !#  ( Architecture Fuses *   (  29M16_4ARRAYAnd/Or *   :  ! ( Architecture Fuses**   =>?@ABCDE(  29MA16_ARRAYAnd/Or T(   :  !#  ( Architecture Fuses T(   (  29MA16_4ARRAYAnd/Or T(   :  ! ( Architecture Fuses*T(   =>?@ABCDE( EE20RA10_ARRAYAnd-Or    (  ! Polarity Fusesd     ? CE22V10_ARRAYAnd/Or   ,   Architecture Fuses    <=Zero-Power Bits@   9 22LV10_ARRAYAnd/Or   ,   Architecture Fuses    <=Zero-Power Bits@   9PALCE610_ARRAYMacrocell 1-16 And   (P   " &$#!'%    !#Macrocell 1-16 I/O Arch P   P(*,+) TURBO bitsP   - 26V12_ARRAYAnd/Orx   4   !# Architecture Fusesx0   <=>? CE24V10_ARRAYAnd/Or   P0  !#  Arch Bit XOR    < Arch Bit AC1     =Arch Bits Sync   > Arch Bits ACO   ? UES ArrayO   P0CE22V10_PLCC_ARRAYAnd/Or   ,   Architecture Fuses    <=Zero-Power Bits@   9