hļ7ž7Altera PLD Library - V2.30C10130&EP300-CMOS And-Or Gate Array With Output Macrocells ALT_20_HI0ALT_EP300_ARRAY 00C D DdˆØĢģ0Tt˜øÜü   DąÜ’’’Ąø’’’ ”’’’€p’’’`L’’’@(’’’ ’’’ D @`€ Ąą $ H l  “ Ų ü   D$Hl“Ųü ų’’@ł’’`ś’’€ū’’ ü’’Ąż’’ąž’’10131&EP310-CMOS And-Or Gate Array With Output Macrocells ALT_20_LO4ALT_EP310_ARRAY 00C D DdˆØĢģ0Tt˜øÜü   DąÜ’’’Ąø’’’ ”’’’€p’’’`L’’’@(’’’ ’’’ D @`€ Ąą $ H l  “ Ų ü   D$Hl“Ųü ų’’@ł’’`ś’’€ū’’ ü’’Ąż’’ąž’’10132&EP320-CMOS And-Or Gate Array With Output Macrocells ALT_320_LOALT_EP320_ARRAY 00C 13396&EP330-CMOS And-Or Gate Array With Output MacrocellsALT_330€ALT_EP330_ARRAY 00C 10133&EP600-CMOS And-Or Gate Array With Output MacrocellsALT_24ALT_EP600_ARRAY 00C 12579&EP610\T/UV\OTP CMOS And-Or Gate Array-Output MacrocellsALTR_24ALT_EP600_ARRAY 00C 14488&EP610\I/UV\OTP CMOS And-Or Gate Array-Output MacrocellsALTR_24TALT_EP610T_ARRAY 00C 22579&EP610-25*CMOS And-Or Gate Array - Output MacrocellsALTR_24ALT_EP600_ARRAY 00X 13397&EP630-CMOS And-Or Gate Array With Output Macrocells ALTERA_EP630ALT_EP630_ARRAY 00C 10134&EP900\I-CMOS And-Or Gate Array With Output MacrocellsALT_900pALT_EP900_ARRAY 00C (,ūC  ūC 12580&EP910\I-CMOS And-Or Gate Array With Output Macrocells ALTERA_9000ALT_EP900_ARRAY 00C (,ūC  ūC 10135&EP1200-CMOS And-Or Gate Array With Output Macrocells ALT_12_HIALT_EP1200_ARRAY 00C (,10136&EP1210-CMOS And-Or Gate Array With Output Macrocells ALT_12_LOALT_EP1200_ARRAY 00C (,20724&EP1800-CMOS And-Or Gate Array With Output Macrocells DIRECT_68 DIR_EP1800_ARRAY 11C D30724&EP1800568 Pin PLCC To 40 Pin DIP OPTPLC-180 Adaptor Required DIRECT_68_OPT OPT_EP1800_ARRAY 11C (10724&EP1800*68 Pin PLCC To 40 Pin DIP Adaptor RequiredALT_68 ALT_EP1800_ARRAY 00C (22581&EP1810/T-CMOS And-Or Gate Array With Output MacrocellsDIR_68 DIR_EP1800_ARRAY 11C D12581&EP1810/T*68 Pin PLCC To 40 Pin DIP Adaptor Required ALTERA_68 ALT_EP1800_ARRAY 00C (32581&EP1810/T568 Pin PLCC To 40 Pin DIP OPTPLC-180 Adaptor Required ALT_68_OPT OPT_EP1800_ARRAY 00C (23710&EP1830-CMOS And-Or Gate Array With Output MacrocellsDIR_68 DIR_EP1800_ARRAY 11C D13710&EP1830*68 Pin PLCC To 40 Pin DIP Adaptor Required ALTERA_68 ALT_EP1800_ARRAY 00C (14595&EP1830568 Pin PLCC To 40 Pin DIP OPTPLC-180 Adaptor Required ALT_68_OPT OPT_EP1800_ARRAY 00C (14596&EPC1\PC8!8 Pins Dip 1 Megabit Serial EPROMEPC1 EPC1_ARRAY 00D (14597& EPC1\LC20#20 Pins PLCC 1 Megabit Serial EPROMEPC1L20 EPC1L20_ARRAY 00D 12166&EPS444CMOS MicrosequencerALT_444@ALT_EPS444_ARRAY 00C 11298&EPS448!CMOS Microsequencer - DIP SupportALT_448@ALT_EPS448_ARRAY 00C 21298&EPS448"CMOS Microsequencer - PLCC Support ALT_448_PLCC@ALT_EPS448_ARRAY_PLCC 00C 13399&EPM5016@ CMOS EPLD MAX (Adaptor Required) MAX_FMY_5016 5016_ARRAY 00x 12751&EPM5032@ CMOS EPLD MAX (Adaptor Required) MAX_FMY_5032 5032_ARRAY 00C 13400&EPM5064@ CMOS EPLD MAX (Adaptor Required) MAX_FMY_5064 5064_ARRAY 00C (12745&EPM5128@ CMOS EPLD MAX (Adaptor Required) MAX_FMY_5128 5128_ARRAY 00C (13364&EPM5130G@ CMOS EPLD MAX (Adaptor Required) MAX_FMY_5130G 5130G_ARRAY 00C (14113&EPM7032@CMOS EPLD MAX - PLCC Support MAX_FMY_7032 7032_ARRAY 11D ,24113&EPM7032@-CMOS EPLD MAX - QFP Support(Adaptor Required)MAX_FMY_7032_DIP407032_ARRAY_DIP40 11D (34113&EPM7032@'CMOS EPLD MAX - PLCC (Adaptor Required)MAX_FMY_7032_DIP40A7032_ARRAY_DIP40A 11D (14158&EPM7064@#CMOS EPLD MAX - 44 PIN PLCC SupportMAX_FMY_7064_44PLCC7064_ARRAY_44PLCC 11D ,14156&EPM7064@#CMOS EPLD MAX - 68 PIN PLCC SupportMAX_FMY_7064_68PLCC7064_ARRAY_68PLCC 11D D14157&EPM7064@#CMOS EPLD MAX - 84 PIN PLCC Support MAX_FMY_7064 7064_ARRAY 11D T14996&EPM7064@#CMOS EPLD MAX - 100 PIN QFP SupportMAX_FMY_7064_QFP7064_ARRAY_100QFP 00x T14998&EPM7096@#CMOS EPLD MAX - 68 PIN PLCC SupportMAX_FMY_7096_68PLCC7096_ARRAY_68PLCC 11D D14999&EPM7096@#CMOS EPLD MAX - 84 PIN PLCC Support MAX_FMY_7096 7096_ARRAY 11D T14160&EPM7128@CMOS EPLD MAX - PLCC Support MAX_FMY_7128 7128_ARRAY 11D T14168&EPM7128@SDP-7128-100Q Adapter RequiredMAX_FMY_7128_QFP7128_ARRAY_QFP 00X 019999&EPM7128e Compatible@CMOS EPLD MAX - PLCC Support MAX_FMY_7128e 7128e_ARRAY 11D T19997&EPM7128e Compatible@SDP-7128-100Q Adapter Required MAX_FMY_7128f7128e_ARRAY_QFP_COMP 00X 019998&EPM7128e Enhanced@CMOS EPLD MAX - PLCC Support MAX_FMY_7128x 7128e_ARRAY 11D T19996&EPM7128e Enhanced@SDP-7128-100Q Adapter Required MAX_FMY_7128y7128e_ARRAY_QFP_ENH 00X 014159&EPM7160@CMOS EPLD MAX - PLCC Support MAX_FMY_7160 7160_ARRAY 11D T14161&EPM7160e Compatible@CMOS EPLD MAX - PLCC SupportMAX_FMY_7160e_Compatible 7160e_ARRAY 11D T19995&EPM7160e Extended@CMOS EPLD MAX - PLCC SupportMAX_FMY_7160e_Extended 7160e_ARRAY 11D T DIRECT_68_OPTALTERAASAP_180ō— — X ō  č(""!     "ō—PĆ"!     " ALT_68_OPTALTERAASAP180Tōx _ ō ō Č 2d(d"!     "ō_d"!     " ALTERA_24ALTERAASAP_600ōū ū X ō  2č  Xū   ALTR_24ALTERAASAP_600€ōč č X ō  2č Xū   ALTR_24TALTERAASAP_630€ōč č X ^  2d Xč    ALTERA_EP630ALTERAASAP_630ō_ _   ^  2d   _    ALTERA_900ALTERAASAP_900ōč č X ō  2č(()+&  !"#$%&'Xū()+  !#$'( ALTERA_68ALTERAASAP180Tōx _ ō ō Č 2d(d('  !"#$%&'(ōxd(!  !"#$%&( DIRECT_68ALTERAASAP_180ō— — X ō  čD4"DCBA <;:9876210/.-,4ō—PĆ4##"DCBA <;:9876210/.-,4 ALT_20_HIALTERAASAP_300ōŠ Š X ō  2č  XŠ#X ALT_20_LOALTERAASAP_300ō~ ~ X ō  2č  X~ #X ALT_320_LOALTERAASAP_320ō— — X ō  2č  X— ALT_330ALTERAASAP_330ō_ _ ō   2dd  ō_ #ō$ØĖ+,“-ALT_24ALTERAASAP_600ō— — X ō  2č  X—   ALT_900ALTERAASAP_900ō— — X ō  2č(()+*  !"#$%&'()+X—()+  !#$'(ALT_900IALTERAASAP_90iōč č X ō  2č(()+*  !"#$%&'()+X—()+  !#$'( ALT_12_HIALTERAASAP_120ō: : X ō  č((')+&  !"#$%&X:'()+!"#$%&'( ALT_12_LOALTERAASAP_120ō— — X ō  č((')+&  !"#$%&X°'()+!"#$%&'(ALT_68ALTERAASAP_180ō— — X ō  č(('  !"#$%&'(ō—PĆ(!  !"#$%&(DIR_68ALTERAASAP180Tōx _ ō ō Č 2dDd4"DCBA <;:9876210/.-,4ō_d4##"DCBA <;:9876210/.-,4+X,,-ōALT_444ALTERAASAP_44Xōā ā ō X    ōā2ALT_448ALTERAASAP_44Xōā ā ō X   ōā2 ALT_448_PLCCALTERAASAP_44Xōā ā ō X   ōā2 MAX_FMY_5016ALTERAEPM5016.rō ö r ©  dč # MAX_FMY_5032ALTERAEPM5032.rō ö r ō  dč # MAX_FMY_5064ALTERAEPM5064.rō ā r ©  dč(   # MAX_FMY_5128ALTERAEPM5128.rō ā r ©  dč(( '((# MAX_FMY_5130GALTERAEPM5130G.rō ā r ©  dč(( '((# MAX_FMY_7032ALTERAepm7032.ōō  d,#%  !"$%&'()+, *##ōMAX_FMY_7032_DIP40ALTERAepm7032d.ōō  d( $&  !"$%'( $ $#ōMAX_FMY_7032_DIP40AALTERAepm7032a.ōō  d( $  !"#$%'( & (#ōMAX_FMY_7064_QFPALTERAepm7064c.ōō  d MAX_FMY_7064ALTERAepm7064.ōō  T &+5BN &+5BN */;HR &+5BNMAX_FMY_7064_68PLCCALTERAepm7064a.ōō  D #+5? #+5?"&0:B #+5?MAX_FMY_7064_44PLCCALTERAepm7064b.ĀĀ  ,## *# * MAX_FMY_7096ALTERAepm7096.ōō  T &+5BN &+5BN */;HR  &+5BNTMAX_FMY_7096_68PLCCALTERAepm7096a.ōō  D #+5? #+5?"&0:B  #+5?D MAX_FMY_7128ALTERAepm7128.ōō  T B&+5N B&+5N */HR; B&+5NMAX_FMY_7128_QFPALTERAepm7128q.ōō  0,+  !"#$%&'()*+,, MAX_FMY_7128eALTERAepm7128e.ōō  T B&+5N B&+5N */HR; B&+5N MAX_FMY_7128fALTERAepm7128f.ōō  0,/  !"#$%&'()*+-./0,, MAX_FMY_7128yALTERAepm7128y.ōō  0,/  !"#$%&'()*+-./0,, MAX_FMY_7128xALTERAepm7128x.ōō  T B&+5N B&+5N */HR; B&+5N MAX_FMY_7160ALTERAepm7160.ōō  T B&+5N B&+5N */HR;  B&+5NTMAX_FMY_7160e_CompatibleALTERAepm7160e.ōō  T B&+5N B&+5N */HR;  B&+5NTMAX_FMY_7160e_ExtendedALTERAepm7160x.ōō  T B&+5N B&+5N */HR;  B&+5NTEPC1ALTERAepc1.ōč č Š X  dč#ōEPC1L20ALTERAepc1.ōč č Š X  dč   #ō  OPT_EP1800_ARRAYQuad A, Macrocell 1-12@)    xX#       !#Quad B, Macrocell 13-24@)@)    xXQuad C, Macrocell 25-36€R@)    xXQuad D, Macrocell 37-48Ą{@)    xXMacrocell 1-12 I/O Arch„<    Macrocell 13-24 I/O Arch<„<    $%&Macrocell 25-36 I/O Archx„<    $%&Macrocell 37-48 I/O Arch“„<    $%&Macrocell 1-12 OE/CLKš„    $%&Macrocell 13-24 I/O Archņ„    $%&Macrocell 25-36 I/O Archō„    $%&Macrocell 37-48 I/O Archö„    $%& TURBO Bitsų„    $%&ALT_EP300_ARRAYAnd-Or     $   ! # Output Enable       $ €€€€€€€€€€€€€€€€€€Sync Preset/Async Reset  H     $ €€€€€€€€€€€€€€€€€€+~Output / Feedbackh 8     €€€€€€€€€€€€€€€€€ALT_EP310_ARRAYAnd-Or     $   ! # Output Enable       $ €€€€€€€€€€€€€€€€€€Sync Preset/Async Reset  H     $ €€€€€€€€€€€€€€€€€€+~Output / Feedback€h 8     €€€€€€€€€€€€€€€€€.’ALT_EP320_ARRAYAnd-Or      $   ! # Reference€       $ Architecture Control@        TURBO/MISER`      ALT_EP330_ARRAYAnd-Or    $H  !"#$%   ! # Reference€€     $Architecture Control €@       &&&&&&&&)))))))) TURBO/MISER`      ALT_EP600_ARRAYMacrocell 1-8 And€      (       ! "#Macrocell 9-16 And€ €      ( €€€€€€€€€€€€€€€€€€€€€€€Macrocell 1-8 I/O Arch (     €€€€€€€€€€€€€€€€€(’Į’Į’Į’Į’Į’Į’Į’Į’Į’ĮMacrocell 9-16 I/O Arch ((     €€€€€€€€€€€€€€€€€(’Į’Į’Į’Į’Į’Į’Į’Į’Į’Į TURBO bit #1P     €€€€€€€€€€€€€+ TURBO bit #2Q     €€€€€€€€€€€€€+ALT_EP610T_ARRAYMacrocell 1-8 And€      (       ! "#Macrocell 9-16 And€ €      ( €€€€€€€€€€€€€€€€€€€€€€€Macrocell 1-8 I/O Arch (     €€€€€€€€€€€€€€€€€€€€€€€€(UæUæUæUæUæUæUæUæUæUæMacrocell 9-16 I/O Arch ((     €€€€€€€€€€€€€€€€€€€€€€€€(UæUæUæUæUæUæUæUæUæUæ TURBO bit #1P     €€€€€€€€€€€€€+ TURBO bit #2Q     €€€€€€€€€€€€€+ALT_EP630_ARRAYMacrocell 1-8 And€      (       ! "#Macrocell 9-16 And€ €      ( €€€€€€€€€€€€€€€€€€€€€€€Macrocell 1-8 I/O Arch (     €€€€€€€€€€€€€€€€€€€€€€€€(UæUæUæUæUæUæUæUæUæUæMacrocell 9-16 I/O Arch ((     €€€€€€€€€€€€€€€€€€€€€€€€(UæUæUæUæUæUæUæUæUæUæ TURBO bit #1P     €€€€€€€€€€€€€+ TURBO bit #2Q     €€€€€€€€€€€€€+ALT_EP900_ARRAYMacrocell 1-12€Ą!     x !H #$'  !#$' #$'! " !#Macrocell 13-24€Ą!Ą!     x !H #$'Macrocell 1-12 I/O Arch€C<      ! #$'Macrocell 13-24 I/O Arch€¼C<      ! #$' TURBO bit #1€ ųC      ! #$'+ TURBO bit #2€ łC      ! #$'+ALT_EP1200_ARRAYMacrocells A1, A2 & A3€€    v %$#@ "!(& %$#"!!#Macrocells B1, B2 & B3€€€    v %$#@ "!Macrocell 1-14 I/O Arch€;     %$# "!Macrocell 15-28 I/O Arch€;     %$# "! Clock Mode€&;     %$# "! TURBO bit€);     %$# "!+Power on reset bit€*;     %$# "!+ALT_EP1800_ARRAYQuad A, Macrocell 1-12@)    xX   "!$ # &%!# Quad B, Macrocell 13-24@)@)    xXQuad C, Macrocell 25-36€R@)    xXQuad D, Macrocell 37-48Ą{@)    xXMacrocell 1-12 I/O Arch„<    Macrocell 13-24 I/O Arch<„<    Macrocell 25-36 I/O Archx„<    Macrocell 37-48 I/O Arch“„<    Macrocell 1-12 OE/CLKš„    Macrocell 13-24 I/O Archņ„    Macrocell 25-36 I/O Archō„    Macrocell 37-48 I/O Archö„     TURBO Bitsų„    DIR_EP1800_ARRAYQuad A, Macrocell 1-12@)    DCBAxX 26789: ,-./1;<0!DCBA#Quad B, Macrocell 13-24@)@)    DCBAxXQuad C, Macrocell 25-36€R@)    DCBAxXQuad D, Macrocell 37-48Ą{@)    DCBAxXMacrocell 1-12 I/O Arch„<    DCBAMacrocell 13-24 I/O Arch<„<    Macrocell 25-36 I/O Archx„<    Macrocell 37-48 I/O Arch“„<    Macrocell 1-12 OE/CLKš„    Macrocell 13-24 I/O Archņ„    Macrocell 25-36 I/O Archō„    Macrocell 37-48 I/O Archö„     TURBO Bitsų„    ALT_EPS444_ARRAY Case Eprom€`   Ą€  ! Code Eprom`   Ą(Branch Microwords~(    @ Optimizer¦    Optimizer¦   UID ¦    Turbo BitsAˆ¦   %/Protection BitsAˆ¦   %×ALT_EPS448_ARRAY Case Eprom€`   Ą€ ! Code Eprom`   Ą(Branch Microwords~(    @ Optimizer€¦   %ų Optimizer¦   UID ¦    Turbo BitsAˆ¦   %/Protection BitsAˆ¦   %×ALT_EPS448_ARRAY_PLCC Case Eprom€`   Ą€ !  Code Eprom`   Ą(Branch Microwords~(    @ Optimizer€¦   %ų Optimizer¦   UID ¦    Turbo BitsAˆ¦   %/Protection BitsAˆ¦   %× 5016_ARRAY Data Array  ’’’’’’ (’'''''(’ ­°½’ž§­·½’ž    !(’"’žException Bit Array  Error_Log Array   5032_ARRAY Data Array     !(’"’žException Bit Array  Error_Log Array   5064_ARRAY Data Array   &! "#(" $'Exception Bit Array  Error_Log Array   5128_ARRAY Data Array   ! "  Exception Bit Array  Error_Log Array   5130G_ARRAY Data Array   ! "  Exception Bit Array  Security Bit Array  @Error_Log Array   Load Array   7032_ARRAY Data ArrayN  Ŗ '&%$"! +,!   !"$%&'()7032_ARRAY_DIP40 Data ArrayN  Ŗ ! %'&(!   !"7032_ARRAY_DIP40A Data ArrayN  Ŗ #"!   !"#$%'(! $%'7064_ARRAY_100QFP Data Arrayœ   T !"#'*./0 %,26CEFGKSUY\>AM`Save Data Arrayœ  T 7064_ARRAY Data Arrayœ   T #$%),012!'.46ACDEGMOSSave Data Arrayœ  T 7064_ARRAY_68PLCC Data Arrayœ   T !$'()  %*,46789>@CSave Data Arrayœ  T 7064_ARRAY_44PLCC Data Arrayœ   T  "$%!&'(+Save Data Arrayœ  T 7096_ARRAY Data ArrayÉ   ū !#%(-024 ),9EGIMPS! $'.167:<=>@ACFJLOSave Data ArrayÉ  ū 7096_ARRAY_68PLCCData Array_68PLCCÉ   ū  %'(* !$.89;>@C!124Save Data ArrayÉ  ū 7128_ARRAY Data Array    ¤ %'(-.023"#679@ACDFJLMS Save Data Array   ¤ 7128_ARRAY_QFP Data Array  č   -.0 ")'*Save Data Array  č 7128e_ARRAY Data ArrayY   «  %(-.069@ISave Data ArrayY  « 7128e_ARRAY_QFP_COMP Data Array   č */.0 Save Data Array  č 7128e_ARRAY_QFP_ENH Data Arrayb   š */.0 Save Data Arrayb  š 7160_ARRAY Data ArrayD$   L #%0267 !(),-4<@CDEJKS! '.9=>FLMOSave Data ArrayD$  L 7160e_ARRAY Data Array‘$   S  !%),-04<@CDEJKS!'.679=>FLMOSave Data Array‘$  S EPC1_ARRAY Data Array 1 ’  ņ EPC1L20_ARRAY data array 1  ’  ņ