PCB chip location information ----------------------------- 74xx00 = 2-input NAND 74xx10 = 3-input NAND 74xx20 = 4-input NAND 74xx30 = 8-input NAND 74xx133 = 13-input NAND 74xx03 = 2-input open collector NAND display: A B C D 8 20 20 30 30 7 20 20 20 20 6 20 20 20 20 5 30 00 00 00 4 03 03 03 03 3 03 03 03 03 2 00 00 00 00 1 00 00 00 10 timing: A B C D E 11 20 xx xx xx xx 10 00 00 00 00 10 9 20 20 20 20 20 8 20 00 00 00 00 7 20 20 00 00 10 6 00 00 00 00 10 5 10 10 10 10 00 4 10 10 10 10 xx 3 10 10 10 10 xx 2 10 00 00 00 xx 1 xx 00 00 00 xx PCL: A B C D E 13 xx 133 133 00 00 12 00 00 00 00 00 11 10 10 10 10 10 10 00 00 00 00 10 9 10 10 10 10 00 8 00 00 00 00 00 7 00 00 00 00 00 6 00 00 00 00 00 5 10 10 10 10 xx 4 00 00 00 00 xx 3 10 10 10 10 xx 2 00 00 00 00 xx 1 00 00 00 00 xx PCH: A B C D E 13 00 00 00 00 xx 12 10 10 10 10 00 11 00 00 00 00 00 10 10 10 10 10 00 9 00 00 00 00 00 8 20 20 20 20 00 7 00 00 00 00 00 6 00 00 00 00 00 5 10 10 10 10 xx 4 00 00 00 00 xx 3 10 10 10 10 xx 2 00 00 00 00 xx 1 00 00 00 00 xx ROM: A B C D 11 00 00 xx xx 10 10 20 00 00 9 20 20 20 20 8 20 30 10 00 7 30 30 30 30 6 00 00 xx xx 5 10 20 00 00 4 00 00 00 00 3 00 10 00 10 2 00 00 00 00 1 00 00 00 133 indexer: A B C D E 13 10 10 10 20 20 12 00 00 00 00 30 11 00 00 00 20 00 10 00 00 00 00 10 9 00 00 00 00 00 8 00 00 00 00 00 7 00 00 00 00 20 6 00 00 00 00 20 5 00 00 00 00 xx 4 00 00 00 00 xx 3 00 00 00 00 xx 2 20 20 20 20 xx 1 00 30 30 20 xx RAM: A B C D E 13 xx xx xx xx 30 12 00 00 00 00 00 11 00 00 00 00 00 10 00 00 00 00 00 9 00 00 00 00 00 8 00 00 00 00 30 7 00 00 00 00 00 6 10 10 10 00 00 5 00 10 00 133 xx 4 00 20 10 20 xx 3 30 30 10 10 xx 2 00 00 00 00 xx 1 00 00 00 00 xx --- Gate and Chip Counts -------------------- Resource usage by chip type: gate: 00 10 20 30 133 03 total ----------------------------------- display 10 1 10 3 0 8 32 timing 21 16 9 0 0 0 46 PCL 39 18 0 0 2 0 59 PCH 39 16 4 0 0 0 59 ROM 22 5 7 5 1 0 40 indexer 43 4 10 3 0 0 60 RAM 42 7 2 4 1 0 56 ------------------------------------------- total 216 67 42 15 4 8 352 Resource usage by gate type: gate: 2-in 3-in 4-in 8-in 13-in 2-OC unusd total ------------------------------------------------------ display 40 3 20 3 0 32 -2 96 timing 84 48 18 0 0 0 0 150 PLC 156 54 0 0 2 0 -1 212 PCH 156 48 8 0 0 0 -1 211 ROM 88 15 14 5 1 0 0 123 indexer 172 12 20 3 0 0 0 207 RAM 168 21 4 4 1 0 0 198 ------------------------------------------------------ total 864 201 84 15 4 32 -4 1196 % 72.00 16.75 7.00 1.25 0.33 2.67 unused gates ------------ gate: 2-in 3-in 4-in total ------------------------------- display 1 0 1 2 timing 0 0 0 0 PCL 1 0 0 1 PCH 0 1 0 1 ROM 0 0 0 0 indexer 0 0 0 0 RAM 0 0 0 0 ------------------------------- total 2 1 1 4 --- Logic Board Pinouts ------------------- timing board: 1a - GND 1b - GND 1c - GND 2a - /RUN 0 (in) 2b - -T0 2c - +T0 3a - /RUN 1 (in) 3b - -T1 3c - +T1 4a - /WAIT 0 (out) 4b - -T2 4c - +T2 5a - /WAIT 1 (out) 5b - -T3 5c - +T3 6a - +STOP 0 (in) 6b - -T4 6c - +T4 7a - +STOP 1 (in) 7b - -T5 7c - +T5 8a - +RST (out) 8b - -T6 8c - +T6 9a - -RST (out) 9b - -T7 9c - +T7 10a - 10b - -T8 10c - +T8 11a - 11b - -T9 11c - +T9 12a - 12b - -T10 12c - +T10 13a - 13b - -T11 13c - +T11 14a - 14b - -T12 14c - +T12 15a - 15b - -T13 15c - +T13 16a - 16b - -T14 16c - +T14 17a - 17b - -T15 17c - +T15 18a - 18b - -phi 0 18c - +phi 0 19a - 19b - -phi 1 19c - +phi 1 20a - 20b - -phi 2 20c - +phi 2 21a - 21b - 21c - 22a - 22b - PF (active low) 16 phase outputs to connect to LEDs 22c - PE 23a - PD 23b - PC 23c - PB 24a - PA 24b - P9 24c - P8 25a - P7 25b - P6 25c - P5 26a - P4 26b - P3 26c - P2 27a - P1 27b - P0 27c - /HALT (LED) 28a - s/in /ins (up) SPDT switch to ground 28b - s/in /stp (dn) 28c - run /run (up) SPDT switch to ground 29a - run /ss (dn) 29b - anim /ss (dn) SPDT switch to ground 29c - anim /an (up) 30a - ss /en (NO) pushbutton to ground 30b - ss /dis (NC) 30c - reset /dis (NC) pushbutton to ground 31a - reset /en (NO) 31b - animate speed pot 31c - animate speed pot 32a - VCC 32b - VCC 32c - VCC PCL: 1a - GND 1b - GND 1c - GND 2a - S2 -> S3 (out) 2b - T0 2c - PC0 (out) 3a - S1 -> S2 (out) 3b - T1 3c - PC1 (out) 4a - PC -> S1 (out) 4b - T2 4c - PC2 (out) 5a - S2 -> S1 (out) 5b - T3 5c - PC3 (out) 6a - S3 -> S2 (out) 6b - T4 6c - PC4 (out) 7a - JSR (in) #55 7b - T5 7c - PC5 (out) 8a - RET (in) #54 8b - T6 8c - PC6 (out) 9a - 9b - T7 9c - PC7 (out) 10a - 10b - T8 10c - PC8 (in) 11a - 11b - T13 11c - PC9 (in) 12a - 12b - /T0 12c - PC10 (in) 13a - 13b - CY (out) 13c - PC11 (in) 14a - 14b - CY (in) 14c - SA8 (in) 15a - 15b - /phi1 (in) 15c - SA9 (in) 16a - 16b - /phi2 (in) 16c - SA10 (in) 17a - 17b - +RST (in) 17c - SA11 (in) 18a - 18b - PCbits (out) 18c - Data (in) 19a - 19b - Stackbits (out) 19c - PCD+ (out) 20a - 20b - 20c - PCD- (out) 21a - SC7 21b - SB7 21c - SA7 22a - SC6 22b - SB6 22c - SA6 23a - SC5 23b - SB5 23c - SA5 24a - SC4 24b - SB4 24c - SA4 25a - SC3 25b - SB3 25c - SA3 26a - SC2 26b - SB2 26c - SA2 27a - SC1 27b - SB1 27c - SA1 28a - SC0 28b - SB0 28c - SA0 29a - 29b - PC7 29c - PC6 30a - PC5 30b - PC4 30c - PC3 31a - PC2 31b - PC1 31c - PC0 32a - VCC 32b - VCC 32c - VCC PCH board: 1a - GND 1b - GND 1c - GND 2a - T9 2b - S2 -> S3 (in) 2c - PC8 3a - T10 3b - S1 -> S2 (in) 3c - PC9 4a - T11 4b - PC -> S1 (in) 4c - PC10 5a - T12 5b - S2 -> S1 (in) 5c - PC11 6a - 6b - S3 -> S2 (in) 6c - PC12 7a - IRQ_EN (in) 7b - ACC (in) #53 7c - PC13 8a - RET (in) #54 8b - 8c - PC14 9a - /WRBANK (in) #52 9b - /REL (in) #51 9c - PC15 10a - WR D0 (in) #50 10b - JMP/JSR (in) #49 10c - PCX8 11a - WR D1 (in) #48 11b - Data (serial prg rom in) #47 11c - PCX9 12a - WR D2 (in) #46 12b - Dout (adder sum out) 12c - PCX10 13a - WR D3 (in) #45 13b - CY (in) 13c - PCX11 14a - 14b - CY (out) 14c - STKX8 15a - 15b - /phi1 (in) #44 15c - STKX9 16a - 16b - /phi2 (in) #43 16c - STKX10 17a - 17b - +RST #42 17c - STKX11 18a - 18b - PCbits (in) 18c - 19a - 19b - Stackbits (in) 19c - PCD+ (in) 20a - IRQ (in) #5 20b - /IRQ_OK (out) 20c - PCD- (in) 21a - 21b - 21c - 22a - 22b - 22c - 23a - 23b - 23c - 24a - 24b - 24c - 25a - 25b - 25c - 26a - 26b - 26c - 27a - 27b - 27c - 28a - 28b - 28c - 29a - 29b - 29c - 30a - 30b - 30c - 31a - 31b - 31c - 32a - 32b - 32c - ROM board + random decode 1a - GND 1b - GND 1c - GND 2a - PC8 2b - PC0 2c - /RUN (out) 3a - PC9 3b - PC1 3c - /WAIT (in) 4a - PC10 4b - PC2 4c - /RST OUT (from ROM emulator) 5a - PC11 5b - PC3 x 5c - /IRQ_OK (input) 6a - PC12 6b - PC4 x 6c - BIT 7a - PC13 7b - PC5 7c - /RST (in) 8a - PC14 8b - PC6 x 8c - ALU_B serial input 9a - PC15 9b - PC7 x 9c - Z_flag 10a - ROM_D0 10b - T0 10c - ROM_D8 11a - ROM_D1 11b - T1 11c - /ROM_D8 12a - ROM_D2 12b - T2 12c - ROM_D9 13a - ROM_D3 13b - T3 13c - /ROM_D9 14a - ROM_D4 14b - T4 14c - ROM_D10 15a - ROM_D5 15b - T9 15c - /ROM_D10 16a - ROM_D6 16b - T10 16c - ROM_D11 17a - ROM_D7 17b - T5 17c - /ROM_D11 18a - /SKIP 18b - T6 18c - ROM_D12 19a - /IRQ_in_progress #41 19b - T7 19c - /ROM_D12 20a - REL 20b - T8 20c - ROM_D13 21a - RET/RTI 21b - T11 21c - /ROM_D13 22a - CALL 22b - T12 22c - ROM_D14 23a - JMP/CALL 23b - T13 23c - /ROM_D14 24a - /RTI 24b - T14 24c - ROM_D15 25a - /phi 1 25b - T15 25c - /ROM_D15 26a - /phi 2 26b - serial_rom_data 26c - ROM_D15 27a - ROM_D14 27b - ROM_D13 27c - ROM_D12 28a - ROM_D11 28b - ROM_D10 28c - ROM_D9 29a - ROM_D8 29b - ROM_D7 29c - ROM_D6 30a - ROM_D5 30b - ROM_D4 30c - ROM_D3 31a - ROM_D2 31b - ROM_D1 31c - ROM_D0 32a - VCC 32b - VCC 32c - VCC external ROM connector on ROM board: 1 - VCC 2 - VCC 3 - D0 4 - A15 5 - D1 6 - A14 7 - D2 8 - A13 9 - D3 10 - A12 11 - D4 12 - A11 13 - D5 14 - A10 15 - D6 16 - A9 17 - D7 18 - A8 19 - D8 20 - A7 21 - D9 22 - A6 23 - D10 24 - A5 25 - D11 26 - A4 27 - D12 28 - A3 29 - D13 30 - A2 31 - D14 32 - A1 33 - D15 34 - A0 35 - /WAIT 36 - /RST (in) from ROM emulator 37 - /RUN 38 - nc 39 - GND 40 - GND indexer board 1a - GND 1b - GND 1c - GND * 2a - WRD_0 * 2b - /WRD_0 * 2c - RAM_A0 * 3a - WRD_1 * 3b - /WRD_1 * 3c - RAM_A1 * 4a - WRD_2 * 4b - /WRD_2 * 4c - RAM_A2 * 5a - WRD3 * 5b - /WRD3 * 5c - RAM_A3 * 6a - WRD4 * 6b - /WRD4 * 6c - RAM_A4 * 7a - WRD5 * 7b - /WRD5 * 7c - RAM_A5 * 8a - WRD6 * 8b - /WRD6 * 8c - RAM_A6 * 9a - WRD7 * 9b - /WRD7 * 9c - RAM_A7 * 10a - OP8 10b - OP0 10c - OP8 11a - /OP8 11b - OP1 11c - /OP8 12a - OP9 12b - OP2 12c - OP9 13a - /OP9 13b - OP3 13c - /OP9 14a - OP10 14b - OP4 14c - OP10 15a - /OP10 15b - OP5 15c - /OP10 16a - OP11 16b - OP6 16c - OP11 * 17a - /OP11 * 17b - OP7 * 17c - /OP11 18a - OP12 18b - WR_F8 #6 18c - OP12 19a - /OP12 19b - WR_F9 #7 19c - /OP12 20a - OP13 20b - /WR_FA 20c - OP13 21a - /OP13 21b - RD_F0 21c - /OP13 22a - OP14 22b - RD_F1 22c - OP14 23a - /OP14 23b - RD_F2 23c - /OP14 24a - OP15 24b - RD_F3 24c - OP15 25a - /OP15 25b - RD_F4 25c - /OP15 * 26a - /RST * 26b - RD_F5 * 26c - WRITE * 27a - F0-F7 (out) * 27b - IRQ_EN * 27c - PHI 2 * 28a - RAM_A11 * 28b - RAM_A10 * 28c - RAM_A9 * 29a - RAM_A8 * 29b - RAM_A7 * 29c - RAM_A6 * 30a - RAM_A5 * 30b - RAM_A4 * 30c - RAM_A3 * 31a - RAM_A2 * 31b - RAM_A1 * 31c - RAM_A0 32a - VCC 32b - VCC 32c - VCC RAM board 1a - GND * 1b - BANK1 * 1c - BANK0 * 2a - /WRD_0 * 2b - WRD_0 * 2c - RAM_A0 3a - /WRD_1 3b - WRD_1 3c - RAM_A1 4a - /WRD_2 4b - WRD_2 4c - RAM_A2 5a - /WRD3 5b - WRD3 5c - RAM_A3 6a - /WRD4 6b - WRD4 6c - RAM_A4 7a - /WRD5 7b - WRD5 7c - RAM_A5 8a - /WRD6 8b - WRD6 8c - RAM_A6 * 9a - /WRD7 * 9b - WRD7 * 9c - RAM_A7 * 10a - OP8 * 10b - T0 * 10c - T1 * 11a - /WAIT * 11b - T2 * 11c - T3 * 12a - OP9 * 12b - T4 * 12c - T5 * 13a - /RST (in) * 13b - T6 * 13c - T7 * 14a - OP10 * 14b - T8 * 14c - T9 * 15a - /RUN * 15b - T10 * 15c - T11 * 16a - OP11 * 16b - T12 * 16c - T15 * 17a - /OP11 * 17b - F0_DATA #8 * 17c - F1_DATA #9 * 18a - OP12 * 18b - F2_DATA #10 * 18c - F3_DATA #11 * 19a - /OP12 * 19b - flag_data (in) * 19c - RLC_data (out) no delay * 20a - OP13 * 20b - ROM_data (in) * 20c - ACC_data (out) delayed 1 clock * 21a - /OP13 * 21b - RD_F0 * 21c - in_data (in) #12 * 22a - OP14 * 22b - RD_F1 * 22c - carry (in) * 23a - /OP14 * 23b - RD_F2 * 23c - RRC_data (out) 2 delay * 24a - OP15 * 24b - RD_F3 * 24c - ALUB_data (out) 1 delay * 25a - /OP15 * 25b - RD_F4 * 25c - ALURES_data (in) * 26a - phi1 * 26b - RD_F5 * 26c - /bxf (out) * 27a - /phi2 * 27b - phi0 * 27c - /out #4 * 28a - wr (out, to indexer) * 28b - F0-F7 (in) 28c - acc (out) no delay *not used* * 29a - /rel (out) *not used* 29b - /ACC7 29c - /ACC6 30a - /ACC5 30b - /ACC4 30c - /ACC3 31a - /ACC2 31b - /ACC1 31c - /ACC0 32a - VCC * 32b - BANK3 * 32c - BANK2 external RAM expansion connector on RAM board: 1 - 2 - 3 - 4 - 5 - 6 - 7 - 8 - 9 - 10 - 11 - 12 - 13 - 14 - 15 - 16 - 17 - 18 - 19 - 20 - 21 - 22 - 23 - 24 - 25 - 26 - 27 - 28 - 29 - 30 - 31 - 32 - 33 - 34 - bit deser acc RAM 0 8A 9A 11A 1 8B 9B 11B 2 8C 9C 11C 3 8D 9D 11D 4 7A 10A 12A 5 7B 10B 12B 6 7C 10C 12C 7 7D 10D 12D data comes out: 13E-8 for RAM serial data 8E-8 for accumulator serial data ALU board: 1a - GND 1b - GND 1c - GND 2a - 2b - 2c - WD0 3a - RLC_data (in) no delay 3b - flag_data (out) 3c - WD1 4a - ACC_data (in) delayed 1 clock 4b - carry (out) 4c - WD2 5a - RRC_data (in) 2 delay 5b - ALURES_data (out) 5c - WD3 6a - ALUB_data (in) 1 delay 6b - Z flag 6c - WD4 7a - BIT (in) 7b - 7c - WD5 8a - 8b - 8c - WD6 9a - 9b - 9c - WD7 10a - OP8 10b - 10c - /WD0 11a - /OP8 11b - 11c - /WD1 12a - OP9 12b - 12c - /WD2 13a - /OP9 13b - 13c - /WD3 14a - OP10 14b - 14c - /WD4 15a - /OP10 15b - 15c - /WD5 16a - OP11 16b - 16c - /WD6 17a - /OP11 17b - 17c - /WD7 18a - OP12 18b - 18c - T1 19a - /OP12 19b - 19c - T2 20a - OP13 20b - 20c - T3 21a - /OP13 21b - 21c - T4 22a - OP14 22b - 22c - T5 23a - /OP14 23b - 23c - T6 24a - OP15 24b - 24c - T7 25a - /OP15 25b - 25c - T8 26a - /bxf (in) 26b - 26c - 27a - 27b - 27c - 28a - 28b - 28c - 29a - 29b - 29c - 30a - 30b - 30c - 31a - 31b - 31c - 32a - VCC 32b - VCC 32c - VCC #5 IRQ in